Chiplet Ips

ZeusCORE XLR MSS

The ZeusCORE Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS) IP is the highest performance SerDes in the Alphawave IP product portfolio. It is a highly configurable IP that supports all leading edge NRZ and PAM data center standards from 1Gbps to 112Gbps, supporting diverse protocols such as PCI-Express Gen1-5 and 1G/10G/25G/50G/100Gbps Ethernet.

What differentiates ZeusCORE is the addition of a Most Likely Sequence Detector (MLSD) that significantly extends the channel reach performance. This extends the system solution space for customers with the most challenging channels.

Zeuscore Web 2

IP Subsystem

Most Likely Sequence Detector (MLSD)

MLSD uses Viterbi Detection to make slicing decisions based on a sequence of data symbols. MLSD minimizes decision error across a sequence of symbols and improves the Signal-to-Noise Ratio and Bit Error Rate of systems.

P Icon1

High speed A/D

The ZeusCORE MSS IP employs a high speed A/D architecture that has configurability for both the A/D sampling rate as well as the A/D resolution

Clock

Sub-sampling clock multiplier

The ZeusCORE CDR employs a wide tuning, sub-samplingclock multiplier that can track over 5000ppm error for both scrambled and 8B/10B encoded data

Master Controller

Master controller

The ZeusCORE DSP Master Controller includes:

  • All required training is integrated, without the need of external RAM
  • Non-destructive eye monitoring
  • 1+D Partial Response Coding
Watch the video

ZeusCORE Proven at 5nm

This video demonstrates the ground-breaking performance of the Alphawave ZeusCORE IP on TSMC N5 technology. 

SPECIFICATIONS

Receive Equalization

Designed for closed eye, backplane systems greated then 40db of insertion loss at Nyquist for PAM4 with high MLSD. Includes blind adaptive equalizer and channel estimator.

Output Driver Voltage

Programmable 400 – 1200 mVdiff-pkpk (inner eye)

Supply Voltages

Core - 0.75V
IO - 1.2V

Devices Used

Core – SVT, LVT and ULVT
IO - 1.8V SVT